Debug connector?

Does anyone happen to know the pinout for this 16-pin unsoldered connector on the LifeDrive? It also seems to be present in the Treos. See for example the Treo 680, top center of the picture there's a row of 8 unsoldered pads, there's another matching 8 above them covered by metal tab on the RF shield. The 680 one has the same GND, NC and VCC arrangement as the LifeDrive.

Update:

According to Chris in the comments below, it is indeed the JTAG port and the pinout is:

9 TDO 8 GPIO 39
10 NC 7 GPIO 118
11 TCK 6 TDI
12 nTRST 5 NC
13 nRESET 4 NC
14 TMS 3 NC
15 GND 2 NC
16 GND 1 3.3VDC

This is the JTAG port, this

This is the JTAG port, this is the proper pinout I believe;
1 3.3 VDC; 16 GND
2 NC; 15 GND
3 NC; 14 TMS
4 NC; 13 NTRST
5 NC; 12 NRESET
6 TDI; 11 TCK
7 GPIO 118; 10 NC
8 GPIO 39; 9 TDO

Have not been real successful in connecting via OPENOCD, any help would be great.

Chris

Brilliant! Thanks very much.

Brilliant! Thanks very much. I'll let you know if I have any success with openocd.

Hmm. I'm not having any

Hmm. I'm not having any luck either. I'm using this JTAG adapter. I know the adapter works as I've used it on the FreeRunner successfully.

# openocd -f openocd.conf
Open On-Chip Debugger 1.0 (2008-10-20-00:11) svn:517M
$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
Error: jtag.c:1291 jtag_examine_chain(): JTAG communication failure, check connection, JTAG interface, target power etc.
Error: jtag.c:1487 jtag_init(): trying to validate configured JTAG chain anyway...
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0000
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0000
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0000
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0000
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0000
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x0000
Error: jtag.c:1495 jtag_init(): Could not validate JTAG chain, exit

Tying TDO high gives me the following which seems to again agree that the adapter is ok.

# openocd -f openocd.conf
Open On-Chip Debugger 1.0 (2008-10-20-00:11) svn:517M
$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
Error: jtag.c:1291 jtag_examine_chain(): JTAG communication failure, check connection, JTAG interface, target power etc.
Error: jtag.c:1487 jtag_init(): trying to validate configured JTAG chain anyway...
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x01ff
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x01ff
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x01ff
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x01ff
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x01ff
Error: jtag.c:1384 jtag_validate_chain(): Error validating JTAG scan chain, IR mismatch, scan returned 0x01ff
Error: jtag.c:1495 jtag_init(): Could not validate JTAG chain, exit

nRESET behaves as it should. The other pins, I don't know. I can't read anything happening on them with a multimeter from either the adapter or the board. I guess it's probably way too fast though, I don't have anything more sophisticated to take a reading with.

Chris, did you trace TDI and TDO directly to the CPU? Could there be something else in the JTAG chain, like perhaps the wi-fi chip?

I will have my tech today

I will have my tech today verify the connections, there must be an error in my listing as I am able to get OpenOCD to at least see the CPU but then does not go any further. I have went back and tried SVN -r 180 but that does not help and it seems even more unstable.

Chris

OK, sorry few mistakes but

OK, sorry few mistakes but they have been double checked now directly to the BGA pads;

1 3.3 VDC; 16 TDO
2 NC; 15 NC
3 NC; 14 TCK
4 NC; 13 NTRST
5 NC; 12 NRESET
6 TDI; 11 TMS
7 GPIO 118; 10 GND
8 GPIO 39; 9 GND

I if anyone gets OpenOCD to work I would be interested int the config file.

Thank you,
Chris

Hmm. On experimenting some

Hmm. On experimenting some more I think the pullups and pulldowns are too strong for my JTAG adapter, it's not able to pull nRESET low enough or TCK high enough. I might try making a parallel port wiggler.

I had problems with the TCK

I had problems with the TCK signal as well with one of my setups, you can bias it with a resistor to 3.3 volts or you can remove the 1K(?)resistor see the photo below, there is a white arrow near the center, this is tied to ground and then makes the signal too weak. The manufacture actually specs it this way.

http://palmdr.com//eBay%20Photos/LD_JTAG_TCK_Resistor.jpg

Hope this helps,
Chris

Can you tell me how/where to

Can you tell me how/where to trace (pdf?) the BGA to jtag on the pxa272fc5312? I have a 700p/700wx, and the only open pins I can find is a ruim slot I think. TIA

Just to clarify (because

Just to clarify (because this threw me off)... the table at the top of this thread (under "Update") has the nRESET and nTRST assignments reversed. Also, the table reflects the layout with the board oriented with the battery connector to the right.

Also probably worth mentioning... it is very difficult to get wires soldered to this connector. I managed to accomplish this, but not without first blowing up my screen backlight somehow. You will need (1) several hours of time, (2) lots of patience, (3) a good soldering iron with a very fine tip in good repair, (4) an illuminated magnifying monocle, (5) wire wrap wire. The technique I learned is as follows: strip the insulation off the end of the wire so that the length of the exposed section matches the length of the pad. Put a very thin coat of solder on the exposed wire beforehand. Lay the wire along the length of the pad, using some tape to hold it in place on the board (you will really need that monocle here). With one hand, use a small flat-head jewler's screwdriver (or some such) to apply downward pressure on the wire at the point where the insulation ends, while applying the tip of the iron with the other hand. Trying to apply solder directly to the joint will probably end in tears. My board had sufficient solder on the pads already, so that the addition of the solder applied to the wire was enough for a good joint.

Just thought I'd share some lessons learned the hard way in case anyone has a go at this. If anyone has a better technique, I'd be interested to hear it. I'm confident I could do this again without sustaining any damage, but I switched to the Treo 650 instead. The 650 has much bigger JTAG pads (see http://hackndev.com/node/365 ). If you're not already settled on the Treo 680, consider the 650 for this reason. It is MUCH easier to attach the JTAG connection. Once this obstacle is overcome, you get a cool development platform loaded with features (IR, serial, USB, Bluetooth, SD card, cellular communication, etc) for the modest price of a Treo off ebay and a JTAG adaptor. Parallel port wigglers can be had for about $20 USD. OpenOCD with gdb is mature and works well. Being able to do hardware debug on the Linux kernel is worth the price of admission alone.

Mike

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